1. Field of the Invention
The present invention relates generally to semiconductor processing and more specifically to structures and methods to reduce the capacitance of conductors on integrated circuits for an increase of switching speed and a reduction in cross-talk between conductors.
2. Description of the Prior Art
The increase in component density and need for ever increasing switching speed in integrated circuits invites a reevaluation of process developments and other methods to reduce detrimental parameters impeding these requirements, like distributed capacitances.
Generally, the performance of integrated circuits semiconductors is dependent on switching speed and noise immunity. The transition time from one logic state (one defined voltage level) to another logic state (another defined voltage level) is dependent on charging or discharging a circuit capacitance between these two voltage levels. The charging or discharging voltage versus time follows a curve given by the basis of the natural logarithm, with an exponent comprising the elapsed time "t" divided by a time constant "RC", where "R" is the resistance of the charging conductor and "C" is the capacitance of the charged element. The switching time to cross the gray, undefined region between logic states to the other logic level is about one time constant.
For a parallel plate capacitor the capacitance is C=(area times eO times eR)/d, where "eO" is the absolute permittivity in vacuum, "eR" is the relative permittivity of the medium between capacitor plates, and "d" is the distance separating the capacitor plates. The relative permittivity "eR" of vacuum or air is 1.0 by definition, while that of silicon dioxide is 3.9, for example.
Regarding a decrease of the time constant "RC", one can consider first the specific resistivity of a conductor per unit length lines on an integrated circuit. Resistivity is a material-specific factor which together with the geometry of the conductor results in its resistance. Conductors comprise metal (e. g. aluminum) lines with a relatively low resistivity or doped polysilicon lines. Within processing constraints one can increase the doping level of the polysilicon in order to decrease its specific resistivity.
The distributed capacitance per unit length of conductor is the other critical factor for a reduction of the time constant "RC". It can be decreased by using a material with a relative permittivity approaching the value of one for the medium surrounding the conductors. The distributed capacitance consists of two portions:
a) the (vertical) "substrate capacitance", which can be decreased, for example, by increasing the thickness of the insulator between conductor and substrate; and PA1 b) the (horizontal) "mutual capacitance" between conductors in close proximity, which results in undesirable capacitive coupling between conductors, called crosstalk. It can be decreased, for example, by increasing the distance between conductors.
However, these approaches for decreasing the distributed capacitance are not practical design options.